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Fault detection in digital and analog circuits using an i(DD) temporal analysis techniqueAn i(sub DD) temporal analysis technique which is used to detect defects (faults) and fabrication variations in both digital and analog IC's by pulsing the power supply rails and analyzing the temporal data obtained from the resulting transient rail currents is presented. A simple bias voltage is required for all the inputs, to excite the defects. Data from hardware tests supporting this technique are presented.
Document ID
19940016633
Document Type
Conference Paper
Authors
Beasley, J. (New Mexico State Univ. Las Cruces, NM, United States)
Magallanes, D. (New Mexico State Univ. Las Cruces, NM, United States)
Vridhagiri, A. (New Mexico State Univ. Las Cruces, NM, United States)
Ramamurthy, Hema (New Mexico State Univ. Las Cruces, NM, United States)
Deyong, Mark (Intelligent Reasoning Systems, Inc. Las Cruces, NM., United States)
Date Acquired
September 6, 2013
Publication Date
January 1, 1993
Publication Information
Publication: New Mexico Univ., The Fifth NASA Symposium on VLSI Design
Subject Category
ELECTRONICS AND ELECTRICAL ENGINEERING
Funding Number(s)
CONTRACT_GRANT: NSF HRD-92-53013
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.

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