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A First Look at 22 nm FDSOI SRAM Single-Event Test ResultsWe will present the first ever single-event effects testing results on a 22 nm fully-depleted silicon-on-insulator test chip. The 128 MB SRAMs were irradiated with heavy ions and the results are compared to previous technology generations.
Document ID
20180003562
Acquisition Source
Goddard Space Flight Center
Document Type
Presentation
External Source(s)
https://nepp.nasa.gov/
Authors
Casey, Megan C. (NASA Goddard Space Flight Center Greenbelt, MD, United States)
Stansberry, Scott (Arctic Slope Regional Corp. (ASRC) Federal Greenbelt, MD, United States)
Seidleck, Christina (Arctic Slope Regional Corp. (ASRC) Federal Greenbelt, MD, United States)
Maharrey, Jeffrey (Defense Microelectronics Activity McClellan, CA, United States)
Gamboa, Dante (Defense Microelectronics Activity McClellan, CA, United States)
Pellish, Jonathan (NASA Goddard Space Flight Center Greenbelt, MD, United States)
LaBel, Kenneth A. (NASA Goddard Space Flight Center Greenbelt, MD, United States)
Date Acquired
June 13, 2018
Publication Date
May 21, 2018
Subject Category
Electronics And Electrical Engineering
Report/Patent Number
GSFC-E-DAA-TN66187
GSFC-E-DAA-TN56702
Meeting Information
Meeting: Military and Aerospace Programmable Logic Devices (MAPLD) Workshop
Location: San Diego, CA
Country: United States
Start Date: May 21, 2018
End Date: May 24, 2018
Sponsors: See Symposium (Single Event Effects)
Funding Number(s)
CONTRACT_GRANT: NNG13CR48C
Distribution Limits
Public
Copyright
Use by or on behalf of the US Gov. Permitted.
Technical Review
Single Expert
Keywords
Silicon-on-insulator
Scaled CMOS
Single-event effects

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