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space qualified high speed reed solomon encoderThis paper reports a Class S CCSDS recommendation Reed Solomon encoder circuit baselined for several NASA programs. The chip is fabricated using United Technologies Microelectronics Center's UTE-R radiation-hardened gate array family, contains 64,000 p-n transistor pairs, and operates at a sustained output data rate of 200 MBits/s. The chip features a pin selectable message interleave depth of from 1 to 8 and supports output block lengths of 33 to 255 bytes. The UTE-R process is reported to produce parts that are radiation hardened to 16 Rads (Si) total dose and 1.0(exp -10) errors/bit-day.
Document ID
19940016615
Document Type
Conference Paper
Authors
Gambles, Jody W.
(New Mexico Univ. Albuquerque., United States)
Winkert, Tom
(NASA Goddard Space Flight Center Greenbelt, MD, United States)
Date Acquired
September 6, 2013
Publication Date
January 1, 1993
Publication Information
Publication: New Mexico Univ., The Fifth NASA Symposium on VLSI Design
Subject Category
COMPUTER OPERATIONS AND HARDWARE
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.

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